计算机与现代化 ›› 2012, Vol. 198 ›› Issue (2): 139-141.doi: 10.3969/j.issn.1006-2475.2012.02.037

• 网络与通信 • 上一篇    下一篇

高速收发器的解析及其在应用中的调试技巧

魏威,李丽,唐桢   

  1. 成都理工大学,四川 成都 610059
  • 收稿日期:2011-11-24 修回日期:1900-01-01 出版日期:2012-02-24 发布日期:2012-02-24

Analysis and Debugging Technique in Application of High-speed Transceiver Logic

WEI Wei, LI Li, TANG Zhen   

  1. Chengdu University of Technology, Chengdu 610059, China
  • Received:2011-11-24 Revised:1900-01-01 Online:2012-02-24 Published:2012-02-24

摘要: 主要解析高速收发器的内部结构及原理,基于高速收发器在高速射频采集系统中的应用,本文提出高速收发器在物理层上不能正常工作时应该注意的事项和相应的解决办法,最终获得正确的仿真波形。

关键词: 高速串口, 高速收发器, 高速射频采集

Abstract: This article mainly analyzes the internal structure and the principle of high-speed transceiver logic. Based on high-speed transceiver logic application in the agglutinative RF acquisition system, from application and debugging of this interface, the paper puts forward some problems and solutions which should pay attention to, and eventually gets the correct simulation waveform.

Key words: high-speed serial interface, high-speed transceiver logic, high-speed RF acquisition

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